| 摘要 |
Disclosed herein is a polishing slurry for use in an STI CMP process, necessary for fabricating ultra highly integrated semiconductors of 256 mega D-RAM or more (Design rule of 0.13 mum or less), which can polish wafers at a high removal rate, having an excellent the removal selectivity of oxide compared to nitride. The polishing slurry can be applied to various patterns required in the course of producing ultra highly integrated semiconductors, and thus excellent removal rate, removal selectivity, and within-wafer-nonuniformity (WIWNU), which indicates removal uniformity, as well as minimal occurrence of micro scratches, can be assured.
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