| 摘要 |
Integrated circuit comprising doped zones ( 3 to 8 ) formed in a substrate ( 1, 2 ), forming a parasite thyristor structure with two parasite bipolar transistors (T<SUB>1</SUB>, T<SUB>2</SUB>), the integrated circuit comprising two metallisations ( 16, 19 ) interconnecting each of the two corresponding doped zones ( 4, 5; 6, 7 ) of the integrated circuit, to reduce the base resistances (R<SUB>N-</SUB>, R<SUB>P-</SUB>) of the two bipolar transistors, at least one of the metallisations ( 16, 19 ) performed to reduce the base resistances (R<SUB>N-</SUB>, R<SUB>P-</SUB>) of the two bipolar transistors, being connected to a power supply metallisation ( 15, 16 ) in the integrated circuit, entirely through the substrate ( 1, 2 ).
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