发明名称 Method, system, and apparatus for tracking defective cache lines
摘要 To facilitate a processor during a reset operation, a linked list of pointers to a list of defective cache lines is created. The good data bits in defective cache lines are used for creating a linked list or other data structure for storing relevant information regarding defective cache lines.
申请公布号 US2006015768(A1) 申请公布日期 2006.01.19
申请号 US20040893015 申请日期 2004.07.16
申请人 VALINE CRAIG M 发明人 VALINE CRAIG M.
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
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