发明名称 |
Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain |
摘要 |
An apparatus for processing data, the apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including at least one secure mode being a mode in the secure domain; and at least one non-secure mode being a mode in the non-secure domain. When the processor is executing a program in a secure mode, the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor further includes a non-secure translation table base address register and a secure translation table base address register operable in the non-secure and secure domain, respectively, to indicate a region of memory storing either non-secure or secure domain memory mapping data defining how virtual addresses are translated to physical addresses within either the non-secure or secure domain. |
申请公布号 |
GB2409745(B) |
申请公布日期 |
2006.01.11 |
申请号 |
GB20050005840 |
申请日期 |
2003.10.27 |
申请人 |
ARM LIMITED |
发明人 |
SIMON CHARLES WATT;CHRISTOPHER BENTLEY DORNAN;LUC ORION;NICOLAS CHAUSSADE;LIONEL BELNET;STEPHANE ERIC SEBASTIEN BROCHIER;DAVID HENNAH MANSELL;MICHAEL ROBERT NONWEILER |
分类号 |
G06F9/46;G01R31/00;G06F9/48;G06F12/00;G06F12/02;G06F12/08;G06F12/10;G06F12/14 |
主分类号 |
G06F9/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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