| 摘要 |
A synchronous flash memory includes an array of non-volatile memory cells. The memory device has a package configuration that is compatible with an SDRAM. The memory device comprises an array of non-volatile memory cells, and a command register to store command data used to control flash memory operations. In operation, the command register is loaded by initiating a command register load operation using a predefined combination of a column address strobe (CAS#) signal, a row address strobe (RAS#) signal, and a write enable (WE#) signal.
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