发明名称 Power-on bias circuit using schmitt trigger
摘要 A power-on bias circuit including a first inverter having an input terminal and an output terminal, the input terminal functions as an input terminal of the power-up bias circuit; a second inverter having an input terminal and an output terminal, the output terminal of the second inverter functions as the output terminal for the power-on bias circuit; and a Schmitt Trigger circuit having an input terminal and an output terminal, wherein the input terminal of the Schmitt Trigger circuit is connected to the output terminal of the first inverter, the output terminal of the Schmitt Trigger circuit is connected to the input terminal of the second inverter, the first inverter, the second inverter and the Schmitt Trigger circuit are each in electrical communication with a voltage input terminal and ground.
申请公布号 US2005073342(A1) 申请公布日期 2005.04.07
申请号 US20030676771 申请日期 2003.10.01
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YU TSUNG-HSIN
分类号 H03K3/3565;H03K17/22;H03L7/00;(IPC1-7):H03L7/00 主分类号 H03K3/3565
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