| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device that allows high integration and speed-up, and to provide a method of the speed-up of a CMOS circuit capable of easily speeding up a CMOS circuit that includes an existing CMOS circuit. SOLUTION: As signal transfer paths made of a plurality of logic gate circuits in a CMOS structure provided between a pair of flip-flop circuits for loading and storing a signal synchronized with a clock signal, there is used a first signal transfer path made of enhance-mode MOSFETs and adapted to have a signal transfer delay time not longer than an allowable signal transfer delay time, and there is used a second signal transfer path adapted to have a signal transfer delay time not longer than the allowable signal transfer delay time by replacing depletion-mode MOSFETs for the enhance-mode MOSFETs that causes a longer signal transfer delay time than the allowable signal transfer delay time, when the enhance-mode MOSFETs constitute one of the plurality of logic gate circuits. COPYRIGHT: (C)2005,JPO&NCIPI
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