发明名称
摘要 PROBLEM TO BE SOLVED: To provide a douplex AAL1 converter, capable of reducing a cost and reducing a software processing load by simplifying a circuit scale, device constitution and software processing required for synchronization, when switching a system without cell damages. SOLUTION: In the state of synchronizing a cell leading phase with the ATM-side interface of a douplex synchronization AAL1SAR function 4 as reference 8 kHzFP, an AAL1 cell payload read control part 42, an AAL1 header giving part 43 and an ATM header giving part 44 generate a fixed number of cells within an 1FP time. By performing a specific VC cell disposal in a specific VC cell disposing part 45, the phase relation of respective VC cells from the 47FP leading of an AAL1 cell existing in a 47FP frequency signal is fixed. When its own system is at stand by and in the case of synchronizing operation instruction, a synchronization cross control part 47×8 frame counter 47 performs subordinate synchronization by using the signal of each 376FP from the AAL1 cell conversion part as a reset signal.
申请公布号 JP3570967(B2) 申请公布日期 2004.09.29
申请号 JP20000136550 申请日期 2000.05.10
申请人 发明人
分类号 H04L1/22;H04J3/00;H04L7/08;H04L12/28 主分类号 H04L1/22
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