| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to increase misalignment margin and contact CD(Critical Dimension) by forming a contact hole using two-step etching. CONSTITUTION: The first interlayer dielectric(32) with a contact plug(34) is formed on a substrate(30). A bit line(36) is formed on the first interlayer dielectric to overlap a hard mask pattern(38). An insulating spacer(40) is formed at both sidewalls of the bit line and the hard mask pattern. The second interlayer dielectric(42) is formed on the resultant structure. A contact hole is formed to expose the contact plug by two-step etching. That is, the second interlayer dielectric is firstly etched by dry-etching and secondly etched by wet-etching.
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