发明名称 STATIC RANDOM ACCESS MEMORY WITH SYMMETRIC LEAKAGE-COMPENSATED BIT LINE
摘要 An eight-cell memory cell for static random access memory, the memory cell comprising cross-coupled inverters to store the information bit, two access nMOSFETs connected to local bit lines to access the stored information bit, and two nMOSFETs each having a gate connected to ground and coupled to the local bit lines and the cross-coupled inverters so that sub-threshold leakage currents to and from the local bit lines for a memory cell not being read are balanced.
申请公布号 US2004047176(A1) 申请公布日期 2004.03.11
申请号 US20020241791 申请日期 2002.09.10
申请人 ALVANDPOUR ATILA;SOMASEKHAR DINESH;HSU STEVEN K.;KRISHNAMURTHY RAM K.;DE VIVEK K. 发明人 ALVANDPOUR ATILA;SOMASEKHAR DINESH;HSU STEVEN K.;KRISHNAMURTHY RAM K.;DE VIVEK K.
分类号 G11C11/412;G11C11/419;(IPC1-7):G11C11/00 主分类号 G11C11/412
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