| 发明名称 |
A method of forming an integrated circuit using an isolation trench having a cavity |
| 摘要 |
Isolation characteristics of an isolation trench can be enhanced. Elements to be isolated by an isolation trench (STI 2) are formed in active semiconductor regions shown by arrows 30 and 31 on a semiconductor substrate 1. The STI 2 is filled with SiOF.
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| 申请公布号 |
US6620703(B2) |
申请公布日期 |
2003.09.16 |
| 申请号 |
US20020117185 |
申请日期 |
2002.04.08 |
| 申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KUNIKIYO TATSUYA |
| 分类号 |
H01L21/76;H01L21/28;H01L21/3205;H01L21/336;H01L21/762;H01L21/768;H01L21/8242;H01L23/522;H01L27/108;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/76 |
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