| 摘要 |
PURPOSE: A method for manufacturing an MDL(Merged DRAM with Logic) semiconductor device is provided to improve the reliability of the device by selectively carrying out manufacturing processes according to the regions of a substrate. CONSTITUTION: A substrate is divided into the first and second region(71,72). The first material layer for gate formation is formed at the upper portion of the first region(71). The second material layer for gate formation is formed on the first and second region(71,72). The second gates(84) is formed on the second region(72), and a boundary dummy pattern layer(85) is simultaneously formed at the boundary between the first and second region(71,72) by selectively patterning the second material layer for gate formation. The first gates(88) are formed on the first region(71) by selectively patterning the first material layer for gate formation. At the time, the first and second region(71,72) are a logic and memory region, respectively.
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