发明名称 METHOD AND DEVICE FOR REDUCING CYCLE SLIP OF FREQUENCY SYNTHESIZER
摘要 PROBLEM TO BE SOLVED: To provide a method and a device for reducing cycle slips resulting from frequency hops in a wireless communication device. SOLUTION: A first signal pulse, which is either reference signal pulse or signal pulse to become the target of comparison, is received, a second signal pulse is received from another source except for the first signal pulse and a control voltage is generated for controlling a voltage controlled oscillator corresponding to a phase difference between the first received signal pulse and the second received signal pulse. When one signal pulse of the same type as the first signal pulse is additionally received at a certain time point between receiving of the first signal pulse and the second signal pulse, a constant voltage is added to the control voltage. After the second signal pulse is received, the constant voltage is decreased from the control voltage when receiving at least one signal pulse of the same type as the second signal pulse.
申请公布号 JP2003101410(A) 申请公布日期 2003.04.04
申请号 JP20020192255 申请日期 2002.07.01
申请人 NOKIA CORP 发明人 ASIKAINEN KALLE;RINTAMAKI SAMI
分类号 H03D13/00;H03L7/089;H03L7/18;H03L7/197;H04L7/033 主分类号 H03D13/00
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