发明名称 Semiconductor memory device including internal power circuit having tuning function
摘要 A tuning control circuit includes fuse devices each shifting from a conductive state to an interrupted state in response to a program input from the outside, and signal driving circuits for driving the signal levels of tuning control signals in accordance with the states of the fuse devices. A reference voltage generating circuit generates a reference voltage corresponding to a reference value of a memory array voltage of a semiconductor memory device according to the invention in accordance with an electrical resistance value which is finely adjusted in response to the tuning control signals.
申请公布号 US2003021162(A1) 申请公布日期 2003.01.30
申请号 US20020120575 申请日期 2002.04.12
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MORISHITA FUKASHI;TAITO YASUHIKO;YAMAZAKI AKIRA;OKAMOTO MAKO;FUJII NOBUYUKI
分类号 G11C11/413;G11C5/02;G11C5/14;G11C11/401;G11C11/407;G11C11/41;H01L27/10;(IPC1-7):G11C5/14 主分类号 G11C11/413
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