| 摘要 |
PURPOSE: A wordline voltage clamping circuit is provided to minimize a power consumption by interrupting the current path after the clamping is implemented as well as to easily setting a clamping voltage by controlling a body bias of a voltage drop transistor, thereby becoming resistant to a lot-to-lot and a wafer-to-wafer variations. CONSTITUTION: A wordline voltage clamping circuit includes a reference voltage generation block(230) for generating a reference voltage in response to a first signal(CE), a bootstrap circuit(220) for generating a pumping voltage being larger than a target voltage to the output terminal in response to the first signal(CE) and a second signal(ATD), a control signal generation block(210) for generating a first and a second control signals(CLAM_EN,CLMP_ENb) in response to the first to a third signals(CE,CLAMP), a clamping control block(240) for generating a compare voltage by dropping the pumping voltage in response to the first and the second control signals(CLAM_EN,CLMP_ENb), a comparator(250) for generating the third signal(CLAMP) by comparing the reference voltage and the comparing voltage and a discharge block(260) for dropping the pumping voltage to the target voltage by discharging the potential of the output terminal in response to the third signal(CLAMP).
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