| 摘要 |
A method is disclosed for forming a split-gate flash memory cell where the floating gate of the cell is self-aligned to isolation, to source and to word line. This multi-self-aligned structure, which provides the maximum shrinkage of the cell that is possible, is also disclosed. The multi-self-alignment is accomplished by first defining the floating gate at the same time the trench isolation is formed, and then self-aligning the source to the floating gate by using a nitride layer as a hard mask in place of the traditional polyoxide, and finally forming a polysilicon spacer to align the word line to the floating gate. Furthermore, a thin floating gate is used to form a thin and sharp poly tip through the use of a "smiling effect" to advantage. The tip substantially decreases the coupling ratio of the floating gate to the word line for fast erasing speed, while at the same time increasing the coupling of the source to the floating gate with the attendant increase in the programming speed of the split gate flash memory cell.
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