发明名称 PARALLEL SIGNALS RECEIVING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress a crosstalk between channels in a parallel signal transmitting system, to which high-speed and multi-channel operation is required. SOLUTION: The first channel of a multi-channel parallel circuit 100, which is a parallel signal receiving circuit of one integrated circuit, is provided with an amplifier 111 for receiving an input signal, a buffer 112 for sending an output signal and an output level fixing circuit 113. The output level fixing circuit 113 is serially connected between the amplifier 111 and the buffer 112, receives the input signal amplified by the amplifier 111, converts it into a logical level signal and outputs it to the buffer 112. The output level fixing circuit 113 measures the receiving level of the input signal and when the interruption of the input signal or receiving level <= prescribed value is detected, that output is fixed to one output level vale. It is preferable that the output level value to be fixed is a logic level 'L' or 'H'.
申请公布号 JP2002141816(A) 申请公布日期 2002.05.17
申请号 JP20000334484 申请日期 2000.11.01
申请人 NEC CORP 发明人 MIYOSHI KAZUNORI
分类号 H04L25/08;H03F3/68;H04B1/10;H04B3/32;(IPC1-7):H04B1/10 主分类号 H04L25/08
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