| 摘要 |
<p>An circuit arrangement and method utilize scheme registers (50) to select among a plurality of indirect address registers (44) from which to retrieve a stored memory address. Rather than identifying within an instruction the location of a particular indirect address register (44) within which is stored an address to be used during processing of the instruction, the instruction specifies the location of a scheme register (50) that identifies which of a plurality of available indirect address registers (44) should be accessed to retrieve a stored address. Scheme registers (50) may be used, for example, in digital signal processing applications to efficiently encode multiple independent addresses within a DSP instruction. Furthermore, while no additional information other than that which identifies an indirect address register (44) may be stored in a scheme register (50), it may also be possible to store additional information such as post-modification and/or access type information such that independent post-modification and type of access may be specified for different independently-generated addresses.</p> |
