发明名称 |
Semiconductor memory device with burst mode access |
摘要 |
A data sensing control circuit according to the present invention is provided in a semiconductor memory device with a burst access mode. The data sensing control circuit generates sensing control signals for data sensing operation by use of a transition information of an address bit signal synchronized with a read enable clock signal and used for a bank selection. According to such a data sensing control scheme, no sensing of each sensing period is performed when the read enable clock signal transitions. Therefore, a power noise (or input/output noise) issued at data-out does not affect the data sensing operation of the semiconductor memory device having the burst access mode.
|
申请公布号 |
US6324115(B1) |
申请公布日期 |
2001.11.27 |
申请号 |
US20000520730 |
申请日期 |
2000.03.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHOI BYENG-SUN |
分类号 |
G11C11/407;G11C7/06;G11C7/10;G11C8/18;G11C11/401;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/407 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|