A process for fabricating an integrated circuit that has embedded dram and logic devices

摘要

A process for fabricating an embedded DRAM device and a logic device on a common semiconductor substrate is disclosed. In the process, a logic device region and a DRAM device region are formed in the substrate by selectively introducing dopants into discrete regions of the substrate. Field oxide regions are formed to electrically isolate the various regions of the substrate. The gate oxide and the gates are then formed. The source and drain of the devices are formed by ion implantation. The source and drains are formed by a first implant of arsenic, followed by a second implant of phosphorus. The phosphorus implant conditions are selected by first determining the damage to the semiconductor substrate and the location of that damage relative to the junction of the device. The phosphorus implant conditions are then selected to cause the location of the junction to move relative to the damage caused by the arsenic implant.