发明名称 IMAGE PROCESSING APPARATUS AND ITS CONTROL PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To suppress power consumption of an image processing apparatus by controlling a clock signal and a power supply voltage applied to a processing circuit corresponding to each processing block in response to an operation mode for the processing apparatus. SOLUTION: In the image processing apparatus where an image processor 2 applies image processing to an image signal captured by an image capturing controller 1 and a display controller 3 displays the processed image, the image capturing controller 1 captures image data with a resolution designated in an operating mode and at a frame rate and the display controller 3 displays the image data with a resolution at a frame rate designated in response to the operation mode. A CPU 5 decides a minimum power supply voltage at which this apparatus can be operated and a frequency of a clock signal on the basis of a setting value stored in a ROM 36 and controls the voltage and the frequency of the clock signal outputted from clock generators 1-23 and regulators 28-32 supplying the clock signal and the power supply voltage to each controller.
申请公布号 JP2001238190(A) 申请公布日期 2001.08.31
申请号 JP20000049690 申请日期 2000.02.25
申请人 CANON INC 发明人 SHIRAGAMI SHINJI
分类号 G06F1/32;G06F1/04;H04N5/232;H04N7/14;H04N7/15;H04N101/00 主分类号 G06F1/32
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