发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit, which has a circuit to be tested composed of plural memory cells and a BIST(built-in self test) circuit, wherein the circuit to be tested can be made compact. SOLUTION: The semiconductor integrated circuit 190 has a circuit to be tested which is a memory cell array 130 consisting of plural address attached memory cells, a self test circuit 170 generating address signals Radr0 and Cadr0, a data detecting circuit 160 detecting memorized data in the memory cells of the addresses indicated by the address signals Radr0 and Cadr0, and a data selecting circuit 165 supplying the self test circuit 170 with memorized data detected by the data detecting circuit 160 when the addresses indicated by the address signals Radr0 and Cadr0 are attached to either of the plural memory cells, or with pre-set setup data when the addresses indicated by address signals Radr0 and Cadr0 are attached to neither of the plural memory cells.
申请公布号 JP2001124831(A) 申请公布日期 2001.05.11
申请号 JP19990307704 申请日期 1999.10.28
申请人 SONY CORP 发明人 MURASHIMA AKIHIKO;MORIYAMA KATSUTOSHI
分类号 G01R31/28;(IPC1-7):G01R31/28 主分类号 G01R31/28
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