| 摘要 |
<p>In an FSK receiver of double superheterodyne type for receiving an FSK modulated wave and comprising a PLL local oscillator (10) for ensuring a phase-locked loop to produce a first local oscillation signal and a demodulating section (12) for demodulating the FSK modulated wave into a demodulated signal using the first local oscillation signal and a second local oscillation signal, a control signal producing circuit (14) produces a control signal when the demodulated signal has a mean value indicative of a deviation from a phase lock in the phase-locked loop. Connected to the demodulating section, a synchronizing circuit (16) establishes bit and frame synchronization on the basis of a binary digital signal obtained by deciding the demodulated signal to produce a synchronization detection signal when the bit and frame synchronization is established. Connected to the PLL local oscillator, the control signal producing circuit, and the synchronizing circuit, an intermittent driving circuit (18) makes the PLL local oscillator intermittently operate on the basis of the control signal and the synchronization detection signal.</p> |
