| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the current consumption by reducing the wiring load capacitance and the gate capacitance which are to be driven one time. SOLUTION: This semiconductor integrated circuit is provided with plural shift register circuits 1 to 4 performing the setting of data successively according to the clock signal (a) of an external clock line 8, plural storage circuits 9 to 12 fetching data from a data line 16 in synchronization with operations of respective shift register circuits 1 to 4. Moreover, in the circuit, the clock line 8 of the shift register circuits 1 to 4 and the data line 16 of the storage circuits 9 to 12 are divided respectively into two lines of internal clock lines 5, 6 and two lines of internal data lines 13, 14, and the circuit is provided with a clock control circuit 7 making the lines 5, 6 to be in operating or nonoperating states in time-division manner and a data control circuit 7 making the data lines 13, 14 to be in operating or nonoperating states in time-division manner to transmissions of the circuits 1 to 4. By this constitution, the wiring load capacitance and the gate capacitance which are to be driven at one time are reduced and the current consumption is managed to be reduced.</p> |
