发明名称 SYSTEM RESET CIRCUIT AND TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To make suitably executable a circuit test without increasing the number of terminals. SOLUTION: The system reset circuit is provided with a 1st voltage comparator 1 for deriving a prescribed output when power supply voltage reaches a 1st prescribed value, an oscillation circuit 2 for receiving the output of the comparator 1 and impressing prescribed frequency to a frequency division circuit 3 and a 2nd voltage comparator 4 for deriving a prescribed output when the power supply voltage reaches 2nd prescribed value larger than the 1st prescribed value. An output is derived from an output terminal T3 after the lapse of a prescribed time from the arrival of the power supply voltage at the 1st prescribed value on the basis of an output from the circuit 3 and the output of the comparator 4 is impressed to the circuit 3 so that a mode is moved to a test mode when the power supply voltage arrives at the 2nd prescribed value larger than the 1st prescribed value.
申请公布号 JP2001005685(A) 申请公布日期 2001.01.12
申请号 JP19990173473 申请日期 1999.06.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 SATO TADANOBU
分类号 G01R31/28;G01R31/3185;G06F1/24;G06F11/22 主分类号 G01R31/28
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