| 摘要 |
PROBLEM TO BE SOLVED: To greatly improve the reliability of switching operation by providing a 3rd logical operation element which outputs a switching signal to a central processor of its system when one of a 1st and a 2nd switching signal is inputted. SOLUTION: Abnormality such as a time-out of a watchdog timer and voltage level variation occurs to a central processor unit of a system A and then an A-system abnormality monitor circuit 11 outputs an A-system abnormality detection signal of high level. Then an inverted B-system abnormality detection signal of high level is outputted from a system B and an inverted operation state command signal is at high level, so an A-system AND element 16 outputs an A-system 1st switching signal of high level as a switching timing setting circuit 15 outputs a switching timing signal of high level. In response to it, a 3rd logical operation element (A-system OR element) 20 outputs an A-system switching signal of high level and according to this signal, the central processor unit of the system A stops operating.
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