| 摘要 |
PROBLEM TO BE SOLVED: To provide a floating point multiplier which performs floating point multiplication at high speed by generating a sticky bit in parallel to the multiplication of mantissa part of floating point data. SOLUTION: Mantissa part M0 and M1 of the floating point data are inputted to a multiplication array 1 and also inputted to zero counting means 4-1 and 4-2 at the same time. The zero counting means 4-1 and 4-2 count the number of zero during the period until 1 appears for the first time from the least significant digit bits of the mantissa part M0 and M1 and an adder 5 sums up their zero count results of the mantissa parts M0 and M1. A comparison circuit 6 compares the adding results of the adder 5 with a constant, 1 as the sticky bit is outputted if the constant is larger than the adding result of the adder 5 and 0 as the sticky bit is outputted if the constant is smaller than the adding result of the adder 5 or the constant is equal to the result. Consequently, it becomes possible to obtain a result of the floating multiplication at high speed because a sticky bit can be generated without using the result which is from the multiplication array 1 and a mantissa part adder 2. |
