发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce adverse effects due to electromagnetic interference EMI by reducing EMI peak energy. SOLUTION: A loop filter LF that extracts a DC component and a low-frequency component from the output of a phase frequency comparator circuit provided for an input of a voltage-controlled oscillator VCO of this PLL circuit consists of resistors R1, R2 and a capacitor C. A control signal applied to the voltage-controlled oscillator VCO is changed by giving a fluctuation modulated signal, whose frequency is lower than that of a clock signal outputted from the voltage controlled oscillator VCO, to a node A so as cause a clock signal outputted by the voltage controlled oscillator VCO to fluctuate. Thus, the spectrum is spread and reduce the EMI peak energy is reduced.
申请公布号 JP2000252817(A) 申请公布日期 2000.09.14
申请号 JP19990054900 申请日期 1999.03.03
申请人 KAWASAKI STEEL CORP 发明人 KOTAKI KOICHI
分类号 H03L7/093 主分类号 H03L7/093
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