发明名称 CIRCUIT AND METHOD FOR DETECTING FRAME SYNCHRONIZATION
摘要 PROBLEM TO BE SOLVED: To reduce power consumption at the time of detecting frame synchronization by automatically switching two frame synchronization circuits in accordance with a synchronizing state, the silence signal state of a line and the state of a device after turning on a power supply. SOLUTION: The system is provided with 1st and 2nd frame synchronization detection circuits 104, 105 having respectively different frame synchronization detecting methods. The former detects an FAS pattern by storing receiving data 103 sent from a receiver 102 in a 3860-stage shift register. The latter detects the FAS pattern by similarly storing an F-bit insertion timing detected by the circuit 104 in a 24-stage shift register. A frame synchronization state control circuit 10 switches the two frame synchronization detection circuits 104, 105 based on the synchronization detection states of the circuits 104, 105. Consequently power consumption required for the detection of frame synchronization can be reduced.
申请公布号 JP2000196577(A) 申请公布日期 2000.07.14
申请号 JP19980370674 申请日期 1998.12.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAGA ATSUSHI
分类号 H04L7/08 主分类号 H04L7/08
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