| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which does not need to be increased in chip area, even if a protective element is added so as to improve the ESD dielectric strength by a CDM (charged device model) method. SOLUTION: This semiconductor integrated circuit is provided with a common line VON (VOFF), to which terminals of elements MN1 (MN2) and MP1 (MP2) other than their terminals connected electrically to the outside are connected in parallel and elements P4 (P5) and P2 (P3) which discharge currents to between the common line and power lines Vdd and V5, and the gate breakdown voltages of the elements P4 (P5) and P2 (P3) which discharge currents are set lower than those of the elements MN1 (MN2) and PM1 (MP2) connected to the common line VON (VOFF).</p> |
