发明名称 Control system and method for semiconductor integrated circuit test process
摘要 A test control system for controlling overall test procedures which processes test data generated from the final test process and analyzes bin category results. The control system uses testers for testing electrical characteristics of IC devices, a host computer for processing data transmitted from the testers and for creating a number of database structures, and distributed computers for monitoring the test progress and analyzing the test results using the database structures stored in the host computer. A control method using the control system includes the steps of: performing a final test as a lot; monitoring the status of the final test progress while storing test data during the final test; determining if the final test is completed; performing a lot decision after the final test is completed based on bin category limits; and displaying the lot decision result and storing the test data. The lot decision is based upon any bin category having a bin capacity exceeding its bin category limit by greater than a certain predetermined value even though the lot meets the yield requirement. As a result, the control system can detect an abnormal lot more easily than a system in which the lot decision is based only on yield.
申请公布号 US6055463(A) 申请公布日期 2000.04.25
申请号 US19980080192 申请日期 1998.05.18
申请人 SAMSUNG ELECTRONICS CO. LTD. 发明人 CHEONG, KWANG YUNG;LEE, ANN SEONG;KIM, JAE YOUNG
分类号 G01D21/00;B07C5/344;G01R31/26;G01R31/28;G06F17/00;G07F7/00;H01L21/02;H01L21/66;H01L49/00;(IPC1-7):B07C17/00 主分类号 G01D21/00
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