发明名称 Method for reducing the pattern sensitivity of ozone assisted chemical vapor deposited (CVD) silicon oxide insulator layers
摘要 A method for forming upon a patterned layer within an integrated circuit an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer having a diminished pattern sensitivity. There is first provided a semiconductor substrate. Formed upon the semiconductor substrate is a patterned layer which provides a pattern sensitivity to an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is also susceptible to modification with a plasma which reduces the pattern sensitivity of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is treated with the plasma. Finally, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer is formed upon the patterned layer. Optionally, a conformal insulator layer may be formed upon the patterned layer prior to forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer upon the patterned layer. The conformal insulator layer may optionally be treated with a second plasma.
申请公布号 US6004873(A) 申请公布日期 1999.12.21
申请号 US19960666160 申请日期 1996.06.19
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 JANG, SYUN-MING;LIU, LU-MIN
分类号 H01L21/316;(IPC1-7):H01L21/476 主分类号 H01L21/316
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