发明名称 Metal gate high voltage integrated circuit/process
摘要 A semiconductor is made on a silicon substrate containing an impurity of a predetermined polarity having formed therein a well containing an impurity of an opposite polarity to a region in the silicon is provided. The method comprises forming a first masking layer on the surface of the substrate, providing openings in the masking layer and implanting dopant ions of a first polarity into the surface of the substrate in a set of first implant regions in the well on either side of a first central region in the well and in a set of second implant regions adjacent to the well on either side of a second central region adjacent to the well, formation of insulating structures over the first and second regions, forming gate oxide layers above the first and second central regions, forming a second masking layer on the surface of the substrate, providing openings in the masking layer and implanting dopant ions of a second polarity into the surface of the substrate in a set of second implant regions in the well on either side of a first central region in the well and in a set of fourth implant regions adjacent to the well on either side of a second central region adjacent to the well, and formation of conductive gate structures over the gate oxide layers.
申请公布号 US5894155(A) 申请公布日期 1999.04.13
申请号 US19970947915 申请日期 1997.10.09
申请人 UNITED MICROELECTRONICS CORPORATION 发明人 YANG, SHENG-HSING
分类号 H01L21/8238;H01L27/092;H01L29/06;H01L29/10;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/13 主分类号 H01L21/8238
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