发明名称 Vertical interconnect process for silicon segments with thermally conductive epoxy preform
摘要 An apparatus for vertically interconnecting stacks of silicon segments. Each segment includes a plurality of adjacent die on a semiconductor wafer. The plurality of die on a segment are interconnected on the segment using one or more layers of metal interconnects which extend to all four sides of the segment to provide edge bonding pads for external electrical connection points. After the die are interconnected, each segment is cut from the backside of the wafer using a bevel cut to provide four inwardly sloping edge walls on each of the segments. After the segments are cut from the wafer, the segments are placed on top of one another to form a stack. Vertically adjacent segments in the stack are electrically interconnected by applying electrically conductive epoxy to one or more sides of the stack. The inwardly sloping edge walls of each of the segments in the stack provide a recess which allows the electrically conductive epoxy to access the edge bonding pads and lateral circuits on each of the segments once the segments are stacked. A thermally conductive epoxy preform is provided between the stack of segments so that the stack of segments are epoxied together. In one embodiment, the thermally conductive epoxy preform includes a plurality of glass spheres randomly distributed within the preform to maintain a distance between the stack of segments.
申请公布号 AU9105298(A) 申请公布日期 1999.03.16
申请号 AU19980091052 申请日期 1998.08.14
申请人 CUBIC MEMORY, INC. 发明人 ALFONS VINDASIUS;KENNETH M SAUTTER
分类号 H01L25/18;H01L21/98;H01L23/373;H01L23/52;H01L25/065;H01L25/07;H01L29/06 主分类号 H01L25/18
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