发明名称 MANUFACTURE OF WIRING BOARD WITH BUMP AND SEMICONDUCTOR PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a low-cost method for manufacturing a wiring board with bumps having a good height accuracy formed on the wiring, provide a method for manufacturing a wiring board with bumps suitable for flip-chip mounting by the advantages of good height accuracy and other reasons, and also provide a method for manufacturing a semiconductor package which has a high reliability in connection between a substrate and bumps. SOLUTION: A first metal layer 9 is formed on an insulated substrate. This metal layer 9 is for forming flat wires afterward. Then, a belt-like pattern 10 is formed from a second metal layer 7. The elements of the belt-like pattern 10 are formed with the same width as that of a projecting bump 4 by an additive process (plating) on a region, where a flat wires 5 will be formed in an after process and in a region, including a space adjacent to the flat wires 5 and between the flat wires 5. Next, the wires are formed. At this time, parts of the elements of the belt-like pattern 10 in the space between the flat wires 5 are removed. As a result, the projecting bumps 4 formed from the second metal layer 7 are formed in such sections, where the belt-like pattern 10 and the flat wires 5 cross each other.
申请公布号 JPH1167823(A) 申请公布日期 1999.03.09
申请号 JP19970214930 申请日期 1997.08.08
申请人 HITACHI CHEM CO LTD 发明人 YAMAZAKI AKIO;NAKAMURA HIDEHIRO;ICHIMURA SHIGEKI
分类号 H01L21/60;H05K3/00;H05K3/24;H05K3/40;(IPC1-7):H01L21/60 主分类号 H01L21/60
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