发明名称 Data transferring system with multiple port bus connecting the low speed data storage unit and the high speed data storage unit and the method for transferring data
摘要 A data processing system using a prefetch mechanism with high speed cache memory to increase the processing speed. Data is prefetched from a low speed main memory to the cache memory for data transfer instructions via multiple ports. For a program control transfer instruction, the prefetch mechanism prefetches instruction for each possible program path, stores them in the cache memory and continues with the prefetch processes.
申请公布号 US5689670(A) 申请公布日期 1997.11.18
申请号 US19960671106 申请日期 1996.10.07
申请人 LUK, FONG 发明人 LUK, FONG
分类号 G06F9/38;G06F12/08;(IPC1-7):G06F9/38;G06F13/00 主分类号 G06F9/38
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