发明名称 |
Step coverage enhancement process for sub half micron contact/via |
摘要 |
A Process for creating a planar topography and enhanced step coverage for the fabrication of contact/via holes in sub-half-micron diameter range with high height vs. dimension aspect ratio. This is accomplished by interrupting the deposition of the barrier layer in the contact/via lining with a programmed reactive ion etching process, which will protect the thin barrier lining in the bottom part of the contact hole, but will etch off and planarize the excessively thick barrier layer near the opening of the hole. The resulting barrier layers show a disrupt columnar film structure which provides better barrier during subsequent metal fill deposition process.
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申请公布号 |
US5654233(A) |
申请公布日期 |
1997.08.05 |
申请号 |
US19960630710 |
申请日期 |
1996.04.08 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD |
发明人 |
YU, CHEN-HUA DOUGLAS |
分类号 |
H01L21/768;(IPC1-7):H01L21/283 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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