发明名称 FLIP CHIP PACKAGING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a flip chip packaging method where yield at the time of packaging is reduced and the reliability of a device is improved. SOLUTION: An electrode 2 is formed on the inner layer of a multilayer substrate 1 and cream solder 4 is applied to a recessed part 3 at the upper part of the electrode 2. Also, a resin 7 for sealing is applied to the surface of the multilayer substrate 1 other than the recessed part 3 in advance on the junction surface between the multilayer substrate 1 and a semiconductor device 5, where the semiconductor device 5 where a bump 6 is formed on a lower surface is brought into contact with the multilayer substrate 1 by aligning the recessed part 3 and the bump 6. Further, the semiconductor device 5 is pressed against the multilayer substrate 1, the cream solder 4 and the bump 6 are brought into contact, they are heated by a reflow oven, the cream solder 4 is melted and the electrode 2 and the bump 6 are brought into contact, at the same time the resin 7 for sealing is cured, and the multilayer substrate 1 is packaged on the semiconductor device 5.</p>
申请公布号 JPH09115954(A) 申请公布日期 1997.05.02
申请号 JP19950266015 申请日期 1995.10.13
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 KUZUHARA KAZUNARI
分类号 H01L21/60;H01L21/56;H01L23/12;H05K1/18;H05K3/46;(IPC1-7):H01L21/60 主分类号 H01L21/60
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