发明名称 CIRCUIT FOR FACILITATING TEST OF MICROCOMPUTER
摘要 PURPOSE:To observe a fault which occurs in a logic circuit from an external output terminal even when the number of the external output terminals of a microcomputer are limited. CONSTITUTION:A test pattern verifying the operation of the microcomputer 8 is inputted from first and second external input terminals 10 and 11 to a first logic circuit block 1. A first internal bus 82 consisting of signal lines 34-45 from the second logic circuit block 3 and the third internal bus 83 consisting of the signal lines 53-62 are inputted to a first selecting equipment 90 and the first selecting equipment 90 outputs the first internal bus 82 or the third internal bus 83. An encoder 92 encodes a signal outputted from the signal line which constitutes the internal bus outputted from the first selecting equipment 90 and outputs it to the forth internal bus 93. The second selecting equipment 94 outputs the forth internal bus 93 from the encoder 92 or the second internal bus 68 consisting of the signal lines 63-67 from the forth logic circuit block 7 to the external output terminals 77-81.
申请公布号 JPH0822400(A) 申请公布日期 1996.01.23
申请号 JP19940155839 申请日期 1994.07.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANIGUCHI MIHO;TANAKA KENJI
分类号 G06F11/22;G06F15/78 主分类号 G06F11/22
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