发明名称 WIRING FOR FET
摘要 <p>PURPOSE:To eliminate crossing of wiring pattern and enable application of PLZT substrate to a back-light device by forming in parallel the wiring patterns and connecting the wiring patterns and electrodes of active elements via thorough holes. CONSTITUTION:A wiring pattern (data line 2) for leading a source electrode S is formed in the same direction as a scanning line 3 on the one surface, namely on the rear surface of the FET forming surface of an insulating substrate (PLZT) 5 and the wiring pattern of this data line 2 is connected with the source electrode S of active element of each TFT via the through hole 7. Therefore, in the case of driving each optical shutter 4 of the PLZT substrate 5 in the active matrix system, each electrode of active element 1 of TFT for driving each optical shutter 4, each electrode of active element 1 of TFT for driving each optical shutter 4 can be led to the external side from the one end part of TFT1. Thereby, wiring patterns can be formed without crossing and can also be used to a display of the back-light system.</p>
申请公布号 JPH04170071(A) 申请公布日期 1992.06.17
申请号 JP19900296238 申请日期 1990.11.01
申请人 FUJITSU GENERAL LTD 发明人 NAKAMA TAKAO
分类号 G02F1/1343;G02F1/136;G02F1/1368;H01L21/768;H01L23/522;H01L29/78;H01L29/786 主分类号 G02F1/1343
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