| 摘要 |
PURPOSE:To reduce the time for signal interruption for a demodulator by applying A/D conversion to each base band signal of P and Q channels in orthogonal relation and outputting a valid area discrimination signal when an outside of outermost shell signal point and four corners in a signal point arrangement on a phase plane is represented. CONSTITUTION:Six-value signals being P and Q channel input base band signals are converted into 4-bit binary digital signals comprising 3-bit data signals D1, D2, D3 and a 1-bit error signal El according to the conversion rule and outputted to a valid area discrimination circuit 13. Then the valid area discrimination circuit 13 detects logic state of digital signals D1P-D3P, E1P, and D1Q-D3Q, E1Q at the outside of the sampling point, brings its output signal to logical 1 when the logic state represents the position at the outside of an outer circumference line of an outermost signal position, brings it to logical 0 when the logic state indicates a void part where 32 signal points exist in other cases and outputs logical 1 or 0 signal to an output terminal 4. |
