| 摘要 |
PURPOSE:To easily and surely execute the relief of a defective bit by executing an access to a preliminary train of a memory by a relief address stored in a register at the time when a defective address stored in the register and an address coincide with each other. CONSTITUTION:When an external address passing through a CPU interface 7 of a cache memory A is compared with a defective address of an address registration register 9a by a comparator 10 and they coincide with each other, a multiplexer 11 selects a relief address of an address registration register 9b, and the respective preliminary trains 1a, 2a of a directory memory 1 and a data memory 2 are brought to access. Subsequently, when a tag from the train 1a and a tag of an address from the interface 7 coincide with each other, data which is read out of the train 2a in accordance with a bit signal CH outputted from a tag comparator 4 is outputted through the interface 7. According to this constitution, a defective bit of a buffer memory of a cache memory in which the number of pins is large is relieved easily and surely and the yield for generating a semiconductor storage device is enhanced substantially. |
