| 摘要 |
PURPOSE:To obtain a semiconductor memory device with fast operation and low noise by providing a level conversion circuit used as decorder in common connecting a circuit part with a small amplitude and a circuit part with a large amplitude and operating circuit parts other than a circuit directly controlling a MOS memory cell array with a small signal amplitude. CONSTITUTION:Peripheral circuits other than a circuit controlling directly a MOS memory cell C requiring a signal with a large amplitude (part excluding predecoder in decoder driver circuits 8X, 8Y) have a small signal level. That is, the amplitude of an internal operation signal and an output signal for a control circuit 9 and an address buffer 5X, an internal operation signal and an input output signal for a predecoder 20 is selected small amplitude Va and the signal with the amplitude Va is level-converted by a decoder word driver 21 (decoder and level conversion circuit and driver) to drive a MOS memory cell C at a large amplitude Vb. The Y system (data line system) circuits 5Y, 8Y are operated similarly as the X system circuits 5X, 8X. Thus, a semiconductor device with high speed and low noise is obtained. |
