发明名称 |
SUBSTRATE OR BACK BIAS GENERATOR |
摘要 |
A circuit for generating a back bias voltage for use in a semiconductor memory device is disclosed, wherein the back bias voltage is clamped within a desired voltage level. The circuit comprises an oscillator for generating a sequence of square waves having a specified frequency, a buffer adapted to be connected with the output of said oscillator and for buffering the output of said oscillator into the square waves having a level of a source supply voltage, a charge pump circuit for providing a back bias voltage by receiving the output of said buffer, and a clamping circuit adapted to be coupled in parallel between the output of said charge pump circuit and a ground level and for clamping within a specified range the back bias voltage being provided by said charge pump circuit in accordance with variations of said source supply voltage. |
申请公布号 |
GB2204456(A) |
申请公布日期 |
1988.11.09 |
申请号 |
GB19880010391 |
申请日期 |
1988.05.03 |
申请人 |
* SAMSUNG SEMICONDUCTOR & TELECOMMUNICATIONS CO LTD |
发明人 |
SU-IN * CHO;DONG-SUN * MIN |
分类号 |
G11C11/413;G05F3/20;G11C5/14;G11C11/408;H02M3/158;H03K5/08;(IPC1-7):G05F3/20;H02M3/07 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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