发明名称 |
Cache memory system with improved re-writing address determination scheme. |
摘要 |
<p>A cache memory system having an improved area addressing scheme for rewriting is disclosed. The cache memory system comprises a cache memory having a plurality of memory areas, means for designating the least recently accessed area by a CPU, means for detecting that the least recently accessed memory area is not designated and means for forcibly selecting a predetermined one memory area for rewriting when the least recently accessed memory area is not designed.</p> |
申请公布号 |
EP0278478(A2) |
申请公布日期 |
1988.08.17 |
申请号 |
EP19880101875 |
申请日期 |
1988.02.09 |
申请人 |
NEC CORPORATION |
发明人 |
ASAI, HIDEHIRO;ECHIGOYA, KENICHI |
分类号 |
G06F12/08;G06F12/12 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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