发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE:To perform the time divisional multiplexing of a signal relating to the same video from second switch according to the status of reading, by distributing an input video signal to two analog memories, and reading out the signal for plural times from the memory on the other side while the input video signal is written on the memory on one side. CONSTITUTION:The memory 54 stores the signal of one horizontal scanning period from an image pickup device in order according to a clock signal 72 in first horizontal scanning period T1. On the other hand, the memory 56 is set at a readout operation mode, and a clock signal 76 from a clock generation circuit 66 is applied on the memory via a switch 70 in first 1/4 period t1 and the next 1/4 period t2, and in the after next 1/4 period t3, a clock signal 74 from a clock generation circuit 64 is applied. Since the output of the memory 56 is returned and written by a connection line 56a, it is possible to read out the data for three times in a non-destructive way. The output of the memory 56 is supplied to an output terminal 60 via a switch 58, and a time divisional multiplex signal consisting of a 1/4 compression signal and a 1/4 and 1/2 compression signal is formed.
申请公布号 JPS63197193(A) 申请公布日期 1988.08.16
申请号 JP19870030275 申请日期 1987.02.12
申请人 CANON INC 发明人 IMAI KUNIO;MINOURA NOBUO
分类号 H04N11/10 主分类号 H04N11/10
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