| 摘要 |
PURPOSE:To improve the economy of the circuit by extracting each bit in each frame, varying delay frame number in various ways to check the presence of a multi-frame synchronization bit in time division multiplex thereby storing the result of detection. CONSTITUTION:A bit extraction means 100 extracts a designation bit in each frame on a highway 1 and a delay means 200 delays the extracted bit by a designated frame number. A multi-frame synchronization bit detection means 300 detects the multi-frame synchronizing bit from the extracted bit and retarded bit and stores it in a storage means 500. Then a timing control means 400 controls the bit extraction timing and the frame number retarding the bit. Through the constitution above, since the multi-frame synchronization of lots of kinds and plural number are detected by using a few circuits in time division, the economy of the multi-frame 1 synchronizing detection circuit is improved. |
