发明名称
摘要 PURPOSE:To achieve extraction by setting a different label to each pattern by separating a logical circuit block pattern from a wiring pattern in a logical circuit figure by tracing straight-line parts belonging to those patterns. CONSTITUTION:A block/wiring pattern separation processing part 8 separates an output from a vector figure 7 into a block pattern and a wiring pattern. The output of a processing part 8 is sent to a wiring pattern labeling processing part 9, which traces straight-line parts belonging to the wiring pattern to give a label to each straight-line component. A wiring pattern labeling integration processing part 10 traces the wiring pattern individually to give the same label to patterns connected electrically. Then, a block pattern recognition processing part 11 traces the straight- line component of each block pattern separated by the processing part 8 to give a label.
申请公布号 JPS6246034(B2) 申请公布日期 1987.09.30
申请号 JP19800103878 申请日期 1980.07.29
申请人 FUJITSU LTD 发明人 YOSHIDA MASUMI;IWATA KYOSHI;MASUI TAKESHI;OSADA SHIGEMI;MATSURA TOSHIO
分类号 G06F17/50 主分类号 G06F17/50
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