| 摘要 |
PURPOSE:To contrive the improvement in setting accuracy of the gate threshold voltage by a method wherein a plurality of insulation gate type field effect transistors are made in a single semiconductor substrate, and a dielectric layer and an electrode layer are arranged by lamination on a gate electrode; thus, the electrode layer is made as a gate voltage impressing terminal to the gate electrode immediately thereunder. CONSTITUTION:A structural section where the electrode layer 10 opposed to a part of the gate electrode 5 across the dielectric layer 9 has been formed, to which layer 10 a gate electrode wiring layer 11 has been connected exists. Therefore, a capacitor is made up of the gate electrode 5, dielectric layer 9, and electrode layer 10; thus, the voltage impressed on the electrode wiring layer 11 comes to impressing on the electrode 5 via this capacitor. In other words, the gate capacitance reduces by series-connection of the capacitor to the electrode 5, leading to equivalence with an increase in thickness of a gate oxide film; accordingly, the gate threshold voltage increases with the capacitance value of added capacitors. The threshold voltage can be controlled by the alteration of a planar pattern design of the gate electrode 5 and the electrode layer 10. |
