发明名称 VECTOR ARITHMETIC DEVICE
摘要 PURPOSE:To execute high speed vector arithmetic compared with software by inverting mask data used at the time of executing the vector arithmetic corresponding to the instruction address of a vector arithmetic instruction. CONSTITUTION:When an IF statement in a DO loop is executed, each element of a vector S(I) and that of a vector Y(I) ar compared, and a vector arithmetic unit 10 produces the mask data. Then the vector arithmetic instruction of A(I)*B(I) is executed, and is placed at an even address. On the other hand, the vector arithmetic instruction of D(I)*E(I) in an ELSE statement is placed at an odd address. When an instruction counter 9 stands at an even number (the lower-most order bit is '0'), the contents of a mast data register MDR 6 are transmitted to the vector arithmetic unit 10. Whereas said counter stands at an odd number (lowe-most order bit is '1'), said contents are transmitted to the unit 10 by inverting them. As a result the mask data can be inverted without software.
申请公布号 JPS61272872(A) 申请公布日期 1986.12.03
申请号 JP19850114783 申请日期 1985.05.28
申请人 NEC CORP 发明人 ISHII HIDESHI
分类号 G06F17/16;G06F15/78 主分类号 G06F17/16
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